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Accelerate Your Future...Be Part of the Leading-Edge Technology

We are looking for motivated and skilled people who want to be part of a diverse organisation and a driving force behind the next generation of the high-growth foundry industry. Headquartered in Singapore, Chartered Semiconductor Manufacturing serves a global customer base from the Americas, Europe and Asia. Chartered has five world-class fabrication facilities in Singapore - including the Company’s first 300mm facility.

Yield Defect Density (YDD) Senior Engineer / Engineer
(Singapore - Woodlands[Map])

Responsibilities:

  • Train and supervise Associate Engineer and Specialist to ensure smooth inline operation.
  • Operate and create recipes in AIT, KLA21XX.
  • Operate SEM/EDX for inline failure analysis.
  • Track inline defect trend charts on weekly basis.
  • Liaise with process engineers in different modules to troubleshoot for inline defects and defect reduction activities.
  • Provide KLA scan support capabilities to yield engineering and modules on yield improvement activities.
  • Provide support to yield prediction and integrated yield management activities.

Requirements:

  • Master/ Degree in Electrical / Electronics / Microelectronics Engineering.
  • At least 2 year's relevant fab experience.
  • Good interpersonal and communication skills.
  • Good team player.

We regret that only shortlisted candidates will be notified.

Advertised on 21-10-09. Application deadline on 11-12-09.

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